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FEATURES 1.8 V to 5.5 V Single Supply 4 (Max) On Resistance 0.75 (Typ) On Resistance Flatness Automotive Temperature Range: -40C to +125C -3 dB Bandwidth > 200 MHz Rail-to-Rail Operation 6-Lead SOT-23 Package and 8-Lead SOIC Package Fast Switching Times: tON = 12 ns tOFF = 6 ns Typical Power Consumption (< 0.01 W) TTL/CMOS Compatible APPLICATIONS Battery-Powered Systems Communication Systems Sample-and-Hold Systems Audio Signal Routing Video Switching Mechanical Reed Relay Replacement GENERAL DESCRIPTION
CMOS 1.8 V to 5.5 V, 2.5 2:1 Mux/SPDT Switch in SOT-23 ADG719
FUNCTIONAL BLOCK DIAGRAM
ADG719
S2 D S1
IN
SWITCHES SHOWN FOR A LOGIC "1" INPUT
PRODUCT HIGHLIGHTS
The ADG719 is a monolithic CMOS SPDT switch. This switch is designed on a submicron process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents. The ADG719 can operate from a single-supply range of 1.8 V to 5.5 V, making it ideal for use in battery-powered instruments and with the new generation of DACs and ADCs from Analog Devices. Each switch of the ADG719 conducts equally well in both directions when on. The ADG719 exhibits break-before-make switching action. Because of the advanced submicron process, -3 dB bandwidths of greater than 200 MHz can be achieved. The ADG719 is available in a 6-lead SOT-23 package and an 8-lead SOIC package.
1. 1.8 V to 5.5 V Single-Supply Operation. The ADG719 offers high performance, including low on resistance and fast switching times, and is fully specified and guaranteed with 3 V and 5 V supply rails. 2. Very Low RON (4 Max at 5 V and 10 Max at 3 V). At 1.8 V operation, RON is typically 40 over the temperature range. 3. Automotive Temperature Range: -40C to +125C 4. On Resistance Flatness (RFLAT(ON)) (0.75 typ). 5. -3 dB Bandwidth > 200 MHz. 6. Low Power Dissipation. CMOS construction ensures low power dissipation. 7. Fast tON /tOFF. 8. Tiny 6-lead SOT-23 and 8-lead SOIC packages.
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002
ADG719-SPECIFICATIONS1 (V
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) 2.5 4 On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) 0.75 1.2 LEAKAGE CURRENTS Source Off Leakage IS (Off) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF 0.01 0.25 0.01 0.25 5 0.1 0.4 +25 C
DD
=5V
10%, GND = 0 V.)
B Version -40 C to +85 C
-40 C to +125 C 0 V to VDD 7
Unit V typ max typ max typ max nA typ
Test Conditions/Comments
VS = 0 V to VDD, IS = -10 mA; Test Circuit 1
VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = 5.5 V VS = 4.5 V/1 V, VD = 1 V/4.5 V; nA max Test Circuit 2 VS = VD = 1 V or VS = VD = 4.5 V; nA max Test Circuit 3
0.4 1.5
0.35 0.35
1 nA typ 5 2.4 0.8 V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min dB typ dB typ dB typ dB typ MHz typ pF typ pF typ
0.005 0.1 7 12 3 6
VIN = VINL or VINH
Break-Before-Make Time Delay, tD 8 1 Off Isolation -67 -87 -62 -82 200 7 27
Channel-to-Channel Crosstalk
Bandwidth -3 dB CS (Off) CD, CS (On) POWER REQUIREMENTS IDD
RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 3 V; Test Circuit 5 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 6 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF; Test Circuit 8
VDD = 5.5 V Digital Inputs = 0 V or 5.5 V 0.001 1.0 A typ A max
NOTES 1 Temperature range is as follows: B Version: -40C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-2-
REV. B
ADG719 SPECIFICATIONS1
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (Off) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF 0.01 0.25 0.01 0.25
(VDD = 3 V
10%, GND = 0 V.)
B Version -40 C to -40 C to +85 C +125 C 0 V to VDD 6 7 10 0.1 0.4 2.5 12
+25 C
Unit V typ max typ max typ nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min dB typ dB typ dB typ dB typ MHz typ pF typ pF typ
Test Conditions/Comments
VS = 0 V to VDD, IS = -10 mA; Test Circuit 1 VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = 3.3 V VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = VD = 1 V or VS = VD = 3 V; Test Circuit 3
0.4
0.35 0.35
1 5 2.0 0.8
0.005 0.1 10 15 4 8
VIN = VINL or VINH
Break-Before-Make Time Delay, tD 8 1 Off Isolation -67 -87 -62 -82 200 7 27
Channel-to-Channel Crosstalk
Bandwidth -3 dB CS (Off) CD, CS (On) POWER REQUIREMENTS IDD
RL = 300 , CL = 35 pF VS = 2 V; Test Circuit 4 RL = 300 , CL = 35 pF VS = 2 V; Test Circuit 4 RL = 300 , CL = 35 pF VS1 = VS2 = 2 V; Test Circuit 5 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 6 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF; Test Circuit 8
VDD = 3.3 V Digital Inputs = 0 V or 3.3 V 0.001 1.0 A typ A max
NOTES 1 Temperature range is as follows: B Version: -40C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
REV. B
-3-
ADG719
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25C, unless otherwise noted.)
TERMINOLOGY
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V Analog, Digital Inputs2 . . . . . . . . . . -0.3 V to VDD + 0.3 V or . . . . . . . . . . . . . . . . . . . . . . . 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle Max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +125C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150C SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 315 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44C/W SOT-23 Package, Power Dissipation . . . . . . . . . . . . . . 282 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
Table I. Truth Table
ADG719 IN 0 1
Switch S1 ON OFF
Switch S2 OFF ON
Most Positive Power Supply Potential Ground (0 V) Reference Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input Ohmic Resistance between D and S On Resistance Match between Any Two Channels i.e., RON max - RON min RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range. IS (Off) Source Leakage Current with the Switch Off ID, IS (On) Channel Leakage Current with the Switch On VD (VS) Analog Voltage on Terminals D and S CS (Off) Off Switch Source Capacitance CD, CS (On) On Switch Capacitance tON Delay between Applying the Digital Control Input and the Output Switching On tOFF Delay between Applying the Digital Control Input and the Output Switching Off tD Off Time or On Time Measured between the 90% Points of Both Switches, when Switching From One Address State to Another Crosstalk A Measure of Unwanted Signal That Is Coupled through from One Channel to Another as a Result of Parasitic Capacitance Off Isolation A Measure of Unwanted Signal Coupling through an Off Switch Bandwidth The Frequency at Which the Output is Attenuated by -3 dBs On Response The Frequency Response of the On Switch Insertion Loss Loss due to On Resistance of Switch
VDD GND S D IN RON RON
PIN CONFIGURATIONS 6-Lead SOT-23 (RT-6)
IN 1 VDD 2 GND 3
6
8-Lead SOIC (RM-8)
S2 D S1
D1 S1 2
8
S2
ADG719
TOP VIEW (Not to Scale)
5 4
NC TOP VIEW GND 3 (Not to Scale) 6 IN
7
ADG719
VDD 4
5
NC
NC = NO CONNECT
ORDERING GUIDE
Model ADG719BRM ADG719BRT
Temperature Range -40C to +125C -40C to +125C
Brand* S5B S5B
Package Description SOIC (MicroSmall Outline IC) [MSOP] SOT-23 (Plastic Surface Mount)
Package Option RM-8 RT-6
*Branding on these packages is limited to three characters due to space constraints.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG719 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-4-
REV. B
Typical Performance Characteristics- ADG719
6.0 5.5 5.0 4.5 4.0 3.5 RON - 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VD OR VS - DRAIN OR SOURCE VOLTAGE - V -0.05 0 10 20 IS (OFF) 30 40 50 60 TEMPERATURE - C 70 80 90 VDD = 5.0V VDD = 3.0V
CURRENT - nA
0.15 VDD = 2.7V TA = 25 C 0.10 VDD = 4.5V VDD = 5V VD = 4.5V/1V VS = 1V/4.5V
ID, I S (ON) 0.05
0
TPC 1. On Resistance vs. VD (VS), Single Supplies
TPC 4. Leakage Currents vs. Temperature
6.0 5.5 5.0 4.5 4.0 -40 C 3.5 +85 C +25 C VDD = 3V
0.15 VDD = 3V VD = 3V/1V VS = 1V/3V 0.10
CURRENT - nA
RON -
3.0 2.5 2.0 1.5 1.0 0.5 0 0 1.0 1.5 2.0 2.5 0.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - V 3.0
0.05
ID, I S (ON)
0
IS (OFF) -0.05 0 10 20 30 40 50 60 TEMPERATURE - C 70 80 90
TPC 2. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3 V
TPC 5. Leakage Currents vs. Temperature
6.0 5.5 5.0 4.5 4.0 3.5 +85 C VDD = 5V
10m VDD = 5V 1m
100
I SUPPLY - A
3.0 3.5 4.0 4.5 5.0
RON -
10 1
3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 +25 C -40 C
100n
10n 1n
1
10
100
VD OR VS - DRAIN OR SOURCE VOLTAGE - V
1k 10k 100k FREQUENCY - Hz
1M
10M
100M
TPC 3. On Resistance vs. VD (VS) for Different Temperatures, VDD = 5 V
TPC 6. Supply Current vs. Input Switching Frequency
REV. B
-5-
ADG719
-30 VDD = 5V, 3V -40 -50
0 VDD = 5V
OFF ISOLATION - dB
ON RESPONSE - dB
-60 -70 -80 -90 -100 -110 -120 -130 10k 100k 1M 10M FREQUENCY - Hz 100M
-2
-4
-6 10k
100k
1M 10M FREQUENCY - Hz
100M
TPC 7. Off Isolation vs. Frequency
TPC 9. On Response vs. Frequency
-30 VDD = 5V, 3V -40 -50
12 10 8
CROSSTALK - dB
-60
QINJ - pC
-70 -80 -90 -100
6 4 VDD 3V 2 0
-110 -120 -130 10k 100k 1M 10M FREQUENCY - Hz 100M
-2 -4 0 1 2
VDD 5V
3 VS - V
4
5
TPC 8. Crosstalk vs. Frequency
TPC 10. Charge Injection vs. Source Voltage
-6-
REV. B
ADG719 Test Circuits
IDS V1 S VS D
IS (OFF) A S D VS
ID (OFF) A VD
VS S D
ID (ON) A VD
RON = V1/I DS
Test Circuit 1. On Resistance
0.1 F VDD
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VIN VDD S VS IN GND D RL 300 CL 35pF VOUT VOUT
50% 90%
50% 90%
tON
tOFF
Test Circuit 4. Switching Times
0.1 F VDD VIN 0V D S2 IN VIN GND D2 RL2 300 CL2 35pF VOUT VOUT 0V 50%
VS1 VS2
S1
VDD
50% 50%
50%
tD
tD
Test Circuit 5. Break-Before-Make Time Delay, tD
VDD
VDD 0.1 F
NETWORK ANALYZER
0.1 F
VDD S IN D VIN GND 50
NETWORK ANALYZER
VDD S1 S2 D R 50
VOUT
RL 50
50
VS
50 VS IN GND
RL 50
VOUT
VOUT OFF ISOLATION = 20 LOG VS
CROSSTALK = 20 LOG
CHANNEL-TO-CHANNEL VOUT VS
Test Circuit 6. Off Isolation
VDD 0.1 F
Test Circuit 7. Channel-to-Channel Crosstalk
VDD S IN D VIN GND
NETWORK ANALYZER
50 VS VOUT
RL 50
INSERTION LOSS = 20 LOG
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Test Circuit 8. Bandwidth
REV. B
-7-
ADG719
APPLICATIONS INFORMATION
The ADG719 belongs to Analog Devices' new family of CMOS switches. This series of general-purpose switches has improved switching times, lower on resistance, higher bandwidths, low power consumption, and low leakage currents.
ADG719 Supply Voltages
Functionality of the ADG719 extends from 1.8 V to 5.5 V single supply, which makes it ideal for battery-powered instruments where power efficiency and performance are important design parameters. It is important to note that the supply voltage effects the input signal range, the on resistance, and the switching times of the part. By taking a look at the Typical Performance Characteristics and the Specifications, the effects of the power supplies can be clearly seen. For VDD = 1.8 V operation, RON is typically 40 over the temperature range.
On Response vs. Frequency
The signal transfer characteristic is dependent on the switch channel capacitance, CDS. This capacitance creates a frequency zero in the numerator of the transfer function A(s). Because the switch on resistance is small, this zero usually occurs at high frequencies. The bandwidth is a function of the switch output capacitance combined with CDS and the load capacitance. The frequency pole corresponding to these capacitances appears in the denominator of A(s). The dominant effect of the output capacitance, CD, causes the pole breakpoint frequency to occur first. Therefore, in order to maximize bandwidth, a switch must have a low input and output capacitance and low on resistance. The On Response vs. Frequency plot for the ADG719 can be seen in TPC 9.
Off Isolation
Figure 1 illustrates the parasitic components that affect the ac performance of CMOS switches (the switch is shown surrounded by a box). Additional external capacitances will further degrade some performance. These capacitances affect feedthrough, crosstalk, and system bandwidth.
CDS S VIN RON CD D VOUT CLOAD RLOAD
Off isolation is a measure of the input signal coupled through an off switch to the switch output. The capacitance, CDS, couples the input signal to the output load when the switch is off, as shown in Figure 2.
CDS S VIN CD D VOUT CLOAD RLOAD
Figure 2. Off Isolation Is Affected by External Load Resistance and Capacitance
Figure 1. Switch Represented by Equivalent Parasitic Components
The transfer function that describes the equivalent diagram of the switch (Figure 1) is of the form A(s) shown below:
s( RON CDS ) + 1 A( s ) = RT s( RT RON CT ) + 1
where: RT = RLOAD ( RLOAD + RON ) CT = CLOAD + CD + CDS
The larger the value of CDS, the larger the values of feedthrough that will be produced. TPC 7 illustrates the drop in off isolation as a function of frequency. From dc to roughly 200 kHz, the switch shows better than -95 dB isolation. Up to frequencies of 10 MHz, the off isolation remains better than -67 dB. As the frequency increases, more and more of the input signal is coupled through to the output. Off isolation can be maximized by choosing a switch with the smallest CDS possible. The values of load resistance and capacitance also affect off isolation, since they contribute to the coefficients of the poles and zeros in the transfer function of the switch when open.
s( RLOAD CDS ) A( s ) = s( RLOAD ) (CLOAD + CD + CDS ) + 1
-8-
REV. B
ADG719
OUTLINE DIMENSIONS 8-Lead Small Outline Package [MSOP] (RM-8)
Dimensions shown in millimeters
3.00 BSC
8
5
3.00 BSC
1 4
4.90 BSC
PIN 1 0.65 BSC 0.15 0.00 0.38 0.22 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187AA 1.10 MAX 8 0 0.80 0.40
0.23 0.08
6-Lead Plastic Surface Mount Package [SOT-23] (RT-6)
Dimensions shown in millimeters
2.90 BSC
6
5
4
1.60 BSC
1 2 3
2.80 BSC
PIN 1 0.95 BSC 1.30 1.15 0.90 1.90 BSC
1.45 MAX
0.22 0.08 10 0 0.60 0.45 0.30
0.15 MAX
0.50 0.30
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-178AB
REV. B
-9-
ADG719 Revision History
Location 7/02 Data Sheet changed from REV. A to REV. B. Page
Changes to Product Name ...............................................................................................................................................................1 Changes to FEATURES ..................................................................................................................................................................1 Additions to PRODUCT HIGHLIGHTS .......................................................................................................................................1 Changes to SPECIFICATIONS ......................................................................................................................................................2 Edits to ABSOLUTE MAXIMUM RATINGS ................................................................................................................................4 Changes to TERMINOLOGY.........................................................................................................................................................4 Edits to ORDERING GUIDE .........................................................................................................................................................4 Added new TPCs 4 and 5 ................................................................................................................................................................5 Replaced TPC 10 ............................................................................................................................................................................6 TEST CIRCUITs 6, 7, and 8 replaced ............................................................................................................................................7 Updated RM-8 and RT-6 package outlines ......................................................................................................................................9
-10-
REV. B
-11-
-12-
C00044-0-7/02(B)
PRINTED IN U.S.A.

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